Unit COMPUTER ARCHITECTURE
- Course
- Informatics
- Study-unit Code
- 20009205
- Curriculum
- In all curricula
- Teacher
- Alfredo Navarra
- Teachers
-
- Alfredo Navarra
- Hours
- 42 ore - Alfredo Navarra
- CFU
- 6
- Course Regulation
- Coorte 2022
- Offered
- 2022/23
- Learning activities
- Caratterizzante
- Area
- Discipline informatiche
- Academic discipline
- INF/01
- Type of study-unit
- Obbligatorio (Required)
- Type of learning activities
- Attività formativa monodisciplinare
- Language of instruction
- Italian
- Contents
- Numbers representation: positional, sign-and-magnitude, twos' complement; Designs of adders, multipliers, and dividers; Floating points: 16 bit standard IEEE 754; Cellular automata: Game of Life, Scintillae and Computer architecture; Abstraction levels: Functional level, RTL. Micro-oprerations. Control Unit. Machine cycle. PDP8: register level, functional level, control unit, Assembly. Cache memory. Pipelining.
- Reference texts
- 1. F. Barsi: Architettura degli elaboratori, parte seconda: struttura dei sistemi. Margiacchi-Galeno
2. C. Hamacher, Z. Vranesic, S. Zaky, Naraig Manjikian: Introduzione all'architettura dei calcolatori III edizione. McGraw-Hill - Educational objectives
- Knowledge and understanding about basic properties of a computer, including assembly programming
- Prerequisites
- Logic elements and Boolean algebra
- Teaching methods
- Face-to-face
Practical training
Seminars - Learning verification modality
- examination in class
- Extended program
- Numbers representation: positional, sign-and-magnitude, twos' complement; Designs of adders and multipliers; Floating points: 16 bit standard IEEE 754; Computer architecture abstraction levels: Functional level, RTL. Micro-oprerations. Control Unit. Machine cycle. PDP8: register level, functional level, control unit, Assembly. Cache memory. Pipelining