Electronic engineering for the internet-of-things
Study-unit Code
In all curricula
Pisana Placidi
  • Pisana Placidi
  • 72 ore - Pisana Placidi
Course Regulation
Coorte 2023
Learning activities
Ingegneria elettronica
Academic discipline
Type of study-unit
Obbligatorio (Required)
Type of learning activities
Attività formativa monodisciplinare
Language of instruction
Embedded systems: general concepts. Architecture: processing and communication. Data processing circuits and technologies. Timing and synchronization in digital systems. Design and co-design flow. Design on FPGA devices.
Reference texts
- Brandolese, Fornaciari, "Sistemi Embedded", Prentice Hall, 2007.
- J.Catsoulis, “Embedded Hardware”, O’Reilly.
- J. Rabaey, A. Chandrakasan and B. Nikolic, "Digital Integrated Circuits: A Design Perspective", 2/e, Prentice Hall 2003.
-Rabaey, Jan, “Low Power Design Essentials Low Power Design Essentials”, Springer.
- Pong P. Chu, “FPGA Prototyping by VHDL Examples: Xilinx MicroBlaze MCS SoC, 2nd Edition”, Wiley, 2017.
-Lecture Notes available on UNISTUDIUM: PIATTAFORMA DI ELEARNING DELL'UNIVERSITÀ DEGLI STUDI DI PERUGIA (https://www.unistudium.unipg.it/unistudium/ ).
Educational objectives
- Main issues related to: the design of embedded electronic systems; the low power techniques; the main issues related to the timing and synchronization of digital circuits; the architecture of selected building blocks.

- Skills: embedded system technologies and building blocks selection; use of commercial tools\design suite to implement (design and test) an embedded system.

- The course helps to achieve also the following learning outcomes: to develop and/or to apply original ideas in different contexts (applications); to solve problems in new environments and/or interdisciplinary contexts; to motivate design choices highlighting critical issues; to integrate knowledge and to handle complexity.
To understand the topics and to achieve the learning objectives, a basic knowledge of Electronics, Boole's algebra, Computer Architecture, and operating systems is required.
The certificate of the course test on safety in the workplace is mandatory.
Teaching methods
The lectures are organized as follows:
- face-to-face lectures;
- seminars
- laboratory activities, dedicated to FPGA programming. The students will attend 10 lab sections, working on projects and problems.
Support tools for teaching: blackboard and PC + projector, PC, development boards.
Other information
First Semester (for details please refer to the link https://www.ing.unipg.it/didattica/studiare-nei-nostri-corsi/orario-lezioni).
Learning verification modality
Expected learning is assessed through:
i) oral exam (score: 0-16; max 30 min);
ii) discussion of a laboratory report/project on FPGA device (score: 0-15, a minimum score equal to 9; the average length of the discussion: 15 min).

The oral exam includes: i) theoretical questions to verify the knowledge and the understanding of the topics discussed during the lectures, as well as the ability to describe the contents; ii) questions requiring the solution of practical cases.
The oral discussion is aimed to verify the student's capability to use methodologies and tools for the design of circuits / systems and his ability to justify design choices. The oral discussion will also allow the examiner to evaluate the communication skills of the student. The discussion FPGA report may take place individually or in groups with the possibility to evaluate each candidate's contribution, relating to the implementation of specific projects

Information on support for students with disabilities and / or DSA is available on the website https://www.unipg.it/disabilita-e-dsa.
Extended program
Introduction (1.2 CFU)
The course: content, learning objectives, teaching materials and methods, Assessment methods.
Embedded Systems (ES): main features, market trends and applications. Design Metrics.

System evolution (1 CFU)
System on Board (SOB), System on Chip (SoC) and System in Package (SiP). Digital systems and mixed systems (analog-digital). Case studies.
Package: materials, levels of interconnects, traditional and new packages, thermal design considerations, evolution.
Supply voltage and reference circuits in SoB.
Design techniques for low power consumption in SOC.

Architecture and design of ES (2.5 CFU)
SoB (components, support and design approach), SoC (design approach. Interconnections: parasitic elements, robustness and performance; electric models. Future prospects: Network on Chip (NoC) and distributed systems. Prototyping platform.
Data processing circuits and technologies: “hardware” technologies (ASIC and programmable circuits) and processors (hints on General Purpose Processor (GPP), Application Specific Instruction Set Processors (ASIP) and Single-Purpose Processors (SPP)).
Timing and synchronization: skew and jitter. Functionality and architecture of: DLL and PLL.

Timing and synchronization (1.3 CFU): skew and jitter. Functionality and architecture of DLL and PLL.

Design Flow (3 CFU)
Design and Co-design, hardware and software development. Verification of embedded systems.
Computer-aided design: architecture and functionality of an FPGA device with laboratory sessions. VHDL language.
Obiettivi Agenda 2030 per lo sviluppo sostenibile

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