Unit COMPUTER ARCHITECTURE
- Course
- Computer science and electronic engineering
- Study-unit Code
- A003128
- Curriculum
- In all curricula
- Teacher
- Carla Binucci
- Teachers
-
- Carla Binucci
- Hours
- 54 ore - Carla Binucci
- CFU
- 6
- Course Regulation
- Coorte 2024
- Offered
- 2024/25
- Learning activities
- Base
- Area
- Matematica, informatica e statistica
- Academic discipline
- ING-INF/05
- Type of study-unit
- Obbligatorio (Required)
- Type of learning activities
- Attività formativa monodisciplinare
- Language of instruction
- Italian
- Contents
- - Information representation
- Introduction to computer architectures
- Computer system organization
- The digital logical level
- The microarchitecture level
- The ISA level - Reference texts
- - Andrew S. Tanenbaum, Structured Computer Organization, 6th Edition, Prentice Hall, 2013
- Educational objectives
- Providing the student with the concepts necessary for understanding computer architectures
- Prerequisites
- Teaching methods
- The course is organized with lectures and exercises on the topics covered in the course.
- Other information
- Learning verification modality
- Written exam.
- Duration: about 100 minutes
- Structure: theoretical questions and exercises. - Extended program
- - Introduction: Milestones in computer architecture; Types of computers; Examples of computer families.
- Information representation: Finite precision numbers; Fixed-base numbering systems; Base conversions; Negative binary numbers; Binary arithmetic; Principles of floating-point arithmetic; IEEE 754 floating-point standard.
- General Organization of a Computer: Organization of a computing system; CPU organization; Main memory: error-correcting codes, Hamming algorithm; Memory hierarchies; Secondary memory: magnetic disks and interfaces, solid-state drives (overview); RAID systems; Buses: basic concepts.
- Digital Logic Level: Introduction to logic gates and Boolean algebra; Basic digital logic circuits: multiplexer, decoder, comparator, shifter, adder, 1-bit ALU, clock; SR latch, D flip-flop; Registers; Memory organization.
- Microarchitecture Level: Introduction to the microarchitecture level: basic concepts; CISC-RISC; Microarchitecture example: Data path, timing, microinstructions, microprogrammed control unit; Performance improvement: prefetching, pipelining, cache memory.
- ISA Level: Overview of the ISA level, data types, instruction formats, addressing, instruction types, flow control. - Obiettivi Agenda 2030 per lo sviluppo sostenibile
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